DSMC ASIC Vs. RED One FPGA

Jim Jannard as been talking a lot lately about how important a successful spin of the ASICs for the DSMC is to the Scarlet and Epic ship date so we thought we would give a brief overview of what exactly he means.

ASIC stands for Application-Specific Integrated Circuit and is basically the “system on a chip” that will run the Scarlet and Epic brains. The reason we haven’t heard of these before is the RED One camera uses an FPGA or Field-Programmable Gate Array. The differences between the two systems are listed below:


FPGA

FPGA hardware is re-programmable via software. This doesn’t mean you can turn your RED One into a laser (not 100% sure on this) but it has allowed RED to add features that weren’t in the original design, such as ramping, 2k @120FPS, Color Science, etc. The ability to re-program also means a much quicker development time as features can be enabled and bugs fixed with software updates once the hardware is out in the field. FPGAs are closer to actual computers and have components like memory and CPUs which must be booted up in sequence (thus the long boot up time on the RED One).

Pros:

  • Re-programmable
  • Much quicker development time

Cons:

  • Slower
  • Slow power up
  • Runs hot
  • Large
  • Power hungry

ASIC

ASICs are mainly controlled by hardware chips and are designed for a specific job. Small firmware updates can be made but nothing near what is possible on the RED One. This means development can take much longer as features have to be built into the chips and bugs squashed prior to shipping. Due to the hardware being optimized for a singular purpose, ASICs are small, very fast and run cool. Most consumer electronics like cellphones and cameras are controlled by ASICs these days and we can expect a start up time closer to DSLRs for the DSMC.  Hardware optimization also means the DSMC will be much less power hungry and from the look of it will be able to use much smaller batteries.

Pros:

  • Fast
  • 1-2 second start up
  • Runs cool
  • Small
  • Power efficient
  • Cheaper in large quantities

Cons:

  • Harder to add features
  • Longer development time
  • Higher initial development costs

4 Comments

  1. Travis Freeburg
    30 November 09, 10:49pm

    Thanks! i was wondering… and u guys explained.

  2. Nelson
    24 December 09, 7:28pm

    But where does ‘spin’ or ‘metal spin’ fit in? I thought ICs were all photographic or photolithographic processes.

  3. 18 January 10, 1:24am

    now were talking! smaller, cooler, faster. do it!

  4. david
    18 January 11, 2:28am

    ASICs are fabricated using a photolithographic process, bottom up, starting from the basic components transistors and finishing up with the metal layers which connect the processors, power supplies etc.

    A complex ASIC can require 40 days to make its way through the fabrication process, roughly 1 day per processing step, where each mask (Red say they have 27) may require more than one processing step.

    In order to save time with prototype devices (not require in mass-production) some wafers can be held in the wafer fab at the later stages of upper metal layer processing.

    The advantage is that instead of taking 40+ days to fix a bug it takes only a few weeks, assuming the problem can be fixed using only changes to metal layers, a “metal spin”.

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